Espressif Systems /ESP32-C6 /EXTMEM /L1_ICACHE0_AUTOLOAD_CTRL

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Interpret as L1_ICACHE0_AUTOLOAD_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (L1_ICACHE0_AUTOLOAD_ENA)L1_ICACHE0_AUTOLOAD_ENA 0 (L1_ICACHE0_AUTOLOAD_DONE)L1_ICACHE0_AUTOLOAD_DONE 0 (L1_ICACHE0_AUTOLOAD_ORDER)L1_ICACHE0_AUTOLOAD_ORDER 0L1_ICACHE0_AUTOLOAD_TRIGGER_MODE 0 (L1_ICACHE0_AUTOLOAD_SCT0_ENA)L1_ICACHE0_AUTOLOAD_SCT0_ENA 0 (L1_ICACHE0_AUTOLOAD_SCT1_ENA)L1_ICACHE0_AUTOLOAD_SCT1_ENA 0L1_ICACHE0_AUTOLOAD_RGID

Description

L1 instruction Cache 0 autoload-operation control register

Fields

L1_ICACHE0_AUTOLOAD_ENA

The bit is used to enable and disable autoload operation on L1-ICache0. 1: enable, 0: disable.

L1_ICACHE0_AUTOLOAD_DONE

The bit is used to indicate whether autoload operation on L1-ICache0 is finished or not. 0: not finished. 1: finished.

L1_ICACHE0_AUTOLOAD_ORDER

The bit is used to configure the direction of autoload operation on L1-ICache0. 0: ascending. 1: descending.

L1_ICACHE0_AUTOLOAD_TRIGGER_MODE

The field is used to configure trigger mode of autoload operation on L1-ICache0. 0/3: miss-trigger, 1: hit-trigger, 2: miss-hit-trigger.

L1_ICACHE0_AUTOLOAD_SCT0_ENA

The bit is used to enable the first section for autoload operation on L1-ICache0.

L1_ICACHE0_AUTOLOAD_SCT1_ENA

The bit is used to enable the second section for autoload operation on L1-ICache0.

L1_ICACHE0_AUTOLOAD_RGID

The bit is used to set the gid of l1 icache0 autoload.

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